AT45DB642D-CNU-SL955 Datasheet
Memory, Integrated Circuits (ICs), IC FLASH 64MBIT 66MHZ 8CASON
Download: AT45DB642D-CNU-SL955 Datasheet 
AT45DB642D-CNU-SL955
Memory, Integrated Circuits (ICs), IC FLASH 64MBIT 66MHZ 8CASON
FEATURES
Single 2.7V - 3.6V Supply
Dual-interface Architecture
- Rapids Serial Interface: 66mhz Maximum Clock Frequency Spi Compatible Modes 0 And 3
- Rapid8 8-bit Interface: 50MHz Maximum Clock Frequency
User Configurable Page Size
- 1024-bytes Per Page - 1056-bytes Per Page - Page Size Can Be Factory Pre-configured For 1024-bytes
Page Program Operation - Intelligent Programming Operation - 8192 Pages (1024-/1056-bytes/page) Main
Memory
Flexible Erase Options - Page Erase (1-kbyte) - Block Erase (8-kbytes) - Sector Erase (256-kbytes) -
Chip Erase (64Mbits)
Two Sram Data Buffers (1024-/1056-bytes) - Allows Receiving Of Data While Reprogramming The Flash
Array
Continuous Read Capability through Entire Array - Ideal for Code Shadowing
Applications
Low-power Dissipation - 10ma Active Read Current Typical - Serial Interface - 10ma Active Read
Current Typical - 8-bit Interface - 25 A Standby Current Typical - 15 A Deep Power Down Typical
Hardware and Software Data Protection
FEATURES - Individual Sector
Permanent Sector Lockdown for Secure Code and Data Storage - Individual Sector
Security: 128-byte Security Register - 64-byte User Programmable Space - Unique 64-byte Device
Identifier
JEDEC Standard Manufacturer and Device ID Read
100,000 Program/Erase Cycles Per Page Minimum
Data Retention - 20 Years
Green (Pb/Halide-free/RoHS Compliant) Packaging Options
Temperature Range - Industrial: -40 C to +85 C
64-megabit 2.7V Dual-interface DataFlash
AT45DB642D
(Not Recommended for New Designs)
3542N-DFLASH-2/2014
Description
At45db642d Is A 2.7v, Dual-interface Sequential Access Flash Memory Ideally Suited For A Wide
variety of digital voice-, image-, program code- and data-storage
Applications. At45db642d Supports Rapids Serial Interface And Rapid8 8-bit Interface. Rapids Serial
Interface Is Spi Compatible For Frequencies Up To 66mhz. The Dual-interface Allows A Dedicated
Serial Interface To Be Connected To A Dsp And A Dedicated 8-bit Interface To Be Connected To A
Microcontroller Or Vice Versa. However, The Use Of Either Interface Is Purely Optional. Its
69,206,016-bits Of Memory Are Organized As 8,192 Pages Of 1,024-bytes (binary Page Size) Or
1,056-bytes (standard Dataflash Page Size) Each. In Addition To The Main Memory, The At45db642d Also
Contains Two Sram Buffers Of 1,024-(binary Buffer Size) Bytes/1,056-bytes (standard Dataflash Buffer
Size) Each. The Buffers Allow Receiving Of Data While A Page In The Main Memory Is Being
Reprogrammed, As Well As Writing A Continuous Data Stream. Eeprom Emulation (bit Or Byte
Alterability) Is Easily Handled With A Self-contained Three Step Read-modify-write Operation. Unlike
Conventional Flash Memories That Are Accessed Randomly With Multiple Address Lines And A Parallel
Interface, The Dataflash Uses Either A Rapids Serial Interface Or A 8-bit Rapid8 Interface To
Sequentially Access Its Data. The Simple Sequential Access Dramatically Reduces Active Pin Count,
Facilitates Hardware Layout, Increases System Reliability, Minimizes Switching Noise, And Reduces
package size. The device is optimized for use in many commercial and industrial
Applications Where High-density, Low-pin Count, Low-voltage And Low-power Are Essential.
To Allow For Simple In-system Reprogrammability, The At45db642d Does Not Require High Input Voltages
For Programming. The Device Operates From A Single Power Supply, 2.7v To 3.6v, For Both The Program
And Read Operations. The At45db642d Is Enabled Through The Chip Select Pin (cs) And Accessed Via A
Three-wire Interface Consisting Of The Serial Input (si), Serial Output (so), And The Serial Clock
(sck), Or An 8-bit Interface Consisting Of The Input/output Pins (i/o7 I/o0) And The Clock Pin
(CLK).
All programming and erase cycles are self-timed.
2 AT45DB642D
3542N-DFLASH-2/2014
AT45DB642D