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DM9161E Datasheet

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DM9161E

10/100 Mbps Fast Ethernet Physical Layer Single Chip Transceiver

DM9161

1. General

Description

The Dm9161 Is A Physical Layer, Single-chip, And Low Power Transceiver For 100base-tx And 10base-t

Operations. On The Media Side, It Provides A Direct Interface Either To Unshielded Twisted Pair

Category 5 Cable (utp5) For 100base-tx Fast Ethernet, Or Utp5/utp3 Cable For 10base-t Ethernet.

Through The Media Independent Interface (mii), The Dm9161 Connects To The Medium Access Control

(MAC) layer, ensuring a high inter operability from different vendors.

The Dm9161 Uses A Low Power And High Performance Cmos Process. It Contains The Entire Physical Layer

Functions Of 100base-tx As Defined By Ieee802.3u, Including The Physical Coding Sublayer (pcs),

Physical Medium Attachment (pma), Twisted Pair Physical Medium Dependent Sublayer (tp-pmd),

10base-tx Encoder/decoder (enc/dec), And Twisted Pair Media Access Unit (tpmau). The Dm9161 Provides

A Strong Support For The Autonegotiation Function, Utilizing Automatic Media Speed And Protocol

Selection. Furthermore, Due To The Built-in Wave Shaping Filter, The Dm9161 Needs No External Filter

to transport signals to the media in 100BASE-TX or 10BASE-T Ethernet operation.

2. Block Diagram

100Base-TX Transceiver

Clock Circuit Block

100Base-TX PCS

MII Interface

10Base-T TX/RX Module

Auto-Negotiation

Biasing/ Power Block

MII Register

LED Driver

MII Management

Control

Version: DM9161-DS-F02

May 10,2002

DM9161

1. General

5. Pin

7. Functional

8. MII Register

9. DC and AC Electrical Characteristics 9.1 Absolute