DS3893AV Datasheet

BTL TURBOTRANSCEIVER

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DS3893AV
BTL TURBOTRANSCEIVER
DS3893A BTL TURBOTRANSCEIVER
March 1997
DS3893A
General
Description
The Turbotransceiver Is Designed For Use In Very High Speed Bus Systems. The Bus Terminal
Characteristics Of The Turbotransceiver Are Referred To As "backplane Transceiver Logic" (btl). Btl
Is A New Logic Signaling Standard That Has Been Developed To Enhance The Performance Of Backplane
Buses. Btl Compatible Transceivers Feature Low Output Capacitance Drivers To Minimize Bus Loading, A
1v Nominal Signal Swing For Reduced Power Consumption And Receivers With Precision Thresholds For
Maximum Noise Immunity. This New Standard Eliminates The Settling Time Delays, That Severely Limit
the TTL bus performance, to provide significantly higher bus transfer rates.
The Turbotransceiver Is Compatible With The Requirements Of The Proposed Ieee 896 Futurebus Draft
Standard. It Is Similar To The Ds3896/97 Btl Trapezoidal Transceivers But The Trapezoidal Feature
Has Been Removed To Improve The Propagation Delay. A Stripline Backplane Is Therefore Required To
Reduce The Crosstalk Induced By The Faster Rise And Fall Times. This Device Can Drive A 10 Load
With A Typical Propagation Delay Of 3.5 Ns For The Driver And 5 Ns For The Receiver.
When Multiple Devices Are Used To Drive A Parallel Bus, The Driver Enables Can Be Tied Together And
Used As A Common Control Line To Get On And Off The Bus. The Driver Enable Delay Is Designed To Be
The Same As The Driver Propagation Delay In Order To Provide Maximum Speed In This Configuration.
The Low Input Current On The Enable Pin Eases The Drive Required For The Common Control Line.
The Bus Driver Is An Open Collector Npn With A Schottky Diode In Series To Isolate The Transistor
Output Capacitance From The Bus When The Driver Is In The Inactive State. The Active Output Low
Voltage Is Typically 1v. The Bus Is Intended To Be Operated With Termination Resistors (selected To
Match The Bus Impedance) To 2.1v At Both Ends. Each Of The Resistors Can Be As Low As 20 .
FEATURES
N Fast Single Ended Transceiver (typical Driver Enable And Receiver Propagation Delays Are 3.5 Ns
and 5 ns)
n Backplane Transceiver Logic (BTL) levels (1V logic swing)
N Less Than 5 Pf Bus-port Capacitance N Drives Densely Loaded Backplanes With Equivalent Load
Impedances Down To 10 N 4 Transceivers In 20 Pin Pcc Package N Specially Designed For Stripline
backplanes n Separate bus ground returns for each driver to minimize
Ground Noise N High Impedance, Mos And Ttl Compatible Inputs N Tri-state Control For Receiver
outputs n Built-in bandgap reference provides accurate receiver
Threshold N Glitch Free Power Up/down Protection On All Outputs N Oxide Isolated Bipolar Technology
Connection and Logic Diagram
00869801
Order Number DS3893AV See NS Package Number V20A
Tri-state Is A Registered Trademark Of National Semiconductor Corporation. Trapezoidal And
TURBOTRANSCEIVER are trademarks of National Semiconductor
2004 National Semiconductor Corporation DS008698
DS3893A
Absolute
MAXIMUM RATINGS (Note 1)
If Military/aerospace Specified Devices Are Required, Please Contact The National Semiconductor
Sales Office/ Distributors for availability and specifications.
Supply Voltage Control Input Voltage Driver Input And Receiver Output Driver Output Receiver Input
Clamp
Current Power Dissipation at 70 C Storage Temperature Range
6.5V 5.5V
15 mA 900 mW 65 C to +150 C
Lead Temperature (Soldering, 3 sec.)
260 C

DS3893AV Datasheet

BTL TURBOTRANSCEIVER

DS3893AV
BTL TURBOTRANSCEIVER
DS3893A BTL TURBOTRANSCEIVER
March 1997
DS3893A BTL TURBOTRANSCEIVER
General
Description
The Turbotransceiver Is Designed For Use In Very High Speed Bus Systems. The Bus Terminal
Characteristics Of The Turbotransceiver Are Referred To As "backplane Transceiver Logic" (btl). Btl
Is A New Logic Signaling Standard That Has Been Developed To Enhance The Performance Of Backplane
Buses. Btl Compatible Transceivers Feature Low Output Capacitance Drivers To Minimize Bus Loading, A
1v Nominal Signal Swing For Reduced Power Consumption And Receivers With Precision Thresholds For
Maximum Noise Immunity. This New Standard Eliminates The Settling Time Delays, That Severely Limit
the TTL bus performance, to provide significantly higher bus transfer rates.
The Turbotransceiver Is Compatible With The Requirements Of The Proposed Ieee 896 Futurebus Draft
Standard. It Is Similar To The Ds3896/97 Btl Trapezoidal Transceivers But The Trapezoidal Feature
Has Been Removed To Improve The Propagation Delay. A Stripline Backplane Is Therefore Required To
Reduce The Crosstalk Induced By The Faster Rise And Fall Times. This Device Can Drive A 10 Load
With A Typical Propagation Delay Of 3.5 Ns For The Driver And 5 Ns For The Receiver.
When Multiple Devices Are Used To Drive A Parallel Bus, The Driver Enables Can Be Tied Together And
Used As A Common Control Line To Get On And Off The Bus. The Driver Enable Delay Is Designed To Be
The Same As The Driver Propagation Delay In Order To Provide Maximum Speed In This Configuration.
The Low Input Current On The Enable Pin Eases The Drive Required For The Common Control Line.
The Bus Driver Is An Open Collector Npn With A Schottky Diode In Series To Isolate The Transistor
Output Capacitance From The Bus When The Driver Is In The Inactive State. The Active Output Low
Voltage Is Typically 1v. The Bus Is Intended To Be Operated With Termination Resistors (selected To
Match The Bus Impedance) To 2.1v At Both Ends. Each Of The Resistors Can Be As Low As 20 .
FEATURES
N Fast Single Ended Transceiver (typical Driver Enable And Receiver Propagation Delays Are 3.5 Ns
and 5 ns)
n Backplane Transceiver Logic (BTL) levels (1V logic swing)
N Less Than 5 Pf Bus-port Capacitance N Drives Densely Loaded Backplanes With Equivalent Load
Impedances Down To 10 N 4 Transceivers In 20 Pin Pcc Package N Specially Designed For Stripline
backplanes n Separate bus ground returns for each driver to minimize
Ground Noise N High Impedance, Mos And Ttl Compatible Inputs N Tri-state Control For Receiver
outputs n Built-in bandgap reference provides accurate receiver
Threshold N Glitch Free Power Up/down Protection On All Outputs N Oxide Isolated Bipolar Technology
Connection and Logic Diagram
DS008698-1
Order Number DS3893AV See NS Package Number V20A
Tri-state Is A Registered Trademark Of National Semiconductor Corporation. Trapezoidal And
TURBOTRANSCEIVER are trademarks of National Semiconductor
1999 National Semiconductor Corporation DS008698
Absolute
MAXIMUM RATINGS (Note 1)
If Military/aerospace Specified Devices Are Required, Please Contact The National Semiconductor
Sales Office/ Distributors for availability and specifications.
Supply Voltage Control Input Voltage Driver Input And Receiver Output Driver Output Receiver Input
Clamp
Current Power Dissipation at 70 C
6.5V 5.5V
15 mA 900 mW
Storage Temperature Range Lead Temperature (Soldering, 3 sec.)
65 C to +150 C 260 C
Recommended Operating Conditions