DS90UB633ARTVTQ1 Datasheet
COST DIFFERENTIATED ADAS 1M PIXE
Download: DS90UB633ARTVTQ1 Datasheet 
DS90UB633ARTVTQ1
COST DIFFERENTIATED ADAS 1M PIXE
DS90UB633A-Q1 SNLS674A - NOVEMBER 2020 - REVISDESD9N0OUVBEM6B3E3RA2-Q0210
SNLS674A - NOVEMBER 2020 - REVISED NOVEMBER 2020
DS90UB633A-Q1 FPD-Link III Serializer for 1-MP/60-fps Cameras 10/12 Bits,100 MHz
FEATURES
Description
AEC-Q100 qualified for automotive
Applications With The Following Results: - Device Temperature Grade 2: -40 C To +105 C Ambient
operating temperature
56.25-MHz to 100-MHz input pixel clock support
Robust Power-Over-Coaxial (PoC) operation
Programmable data payload:
- 8/10-Bit payload 75-MHz to 100-MHz - 12-Bit payload 56.25-MHz to 100-MHz
Continuous Low Latency Bidirectional Control Interface Channel With I2c Support At 400-khz
Embedded clock with DC-balanced coding to support AC-coupled interconnects
Capable of driving up to 15-m coaxial or Shielded Twisted-Pair (STP) cables
4 Dedicated General-Purpose Input/Output (GPIO)
1.8-V, 2.8-V or 3.3-V compatible parallel inputs on serializer
Single power supply at 1.8-V
ISO 10605 and IEC 61000-4-2 ESD compliant
Compatible with DS90UB66x-Q1 and DS90UB63x-Q1 deserializers
Applications
Automotive - Surround View Systems (svs) - Front Cameras (fc) - Rear View Cameras (rvc) - Sensor
Fusion - Driver Monitor Cameras (dms) - Remote Satellite Radar, Tof, And Lidar Sensors
Security and surveillance
Machine vision
Applications
The Ds90ub633a-q1 Device Offers An Fpd-link Iii Interface With A High-speed Forward Channel And A
Bidirectional Control Channel For Data Transmission Over A Single Coaxial Cable Or Differential
Pair. The Ds90ub633a-q1 Device Incorporates Differential Signaling On Both The High-speed Forward
Channel And Bidirectional Control Channel Data Paths. The Serializer/deserializer Pair Is Targeted
For Connections Between Imagers And Video Processors In An Electronic Control Unit (ecu). This
Device Is Ideally Suited For Driving Video Data Requiring Up To 12-bit Pixel Depth Plus Two
synchronization signals along with bidirectional control channel bus.
Using Ti's Embedded Clock Technology Allows Transparent Full-duplex Communication Over A Single
Differential Pair, Carrying Asymmetrical-bidirectional Control Channel Information. This Single
Serial Stream Simplifies Transferring A Wide Data Bus Over Pcb Traces And Cable By Eliminating The
Skew Problems Between Parallel Data And Clock Paths. This Significantly Saves System Cost By
Narrowing Data Paths That In Turn Reduce Pcb Layers, Cable Width, And Connector Size And Pins.
Internal Dc-balanced Encoding/decoding Is Used To Support Ac-coupled Interconnects.
Device Information (1)
PART NUMBER
PACKAGE
BODY SIZE (NOM)